1. Field of the Invention
The present invention relates to a video display control apparatus and a video display control method.
2. Description of the Related Art
As digital cameras and digital camcorders become more popular, their use is remarkably increasing. Video taken by a device such as a digital camera or a digital camcorder can be displayed on a separate video device, such as a CRT, or on LCD panel of the device, which is also used as an interface. In order to provide video data as well as information on the video data, the video data and On Screen Display (OSD) data, or the video data and graphic data, are combined and then displayed as a user interface that can be manipulated by a user.
An OSD is information that a monitor itself displays on its screen without a separate video signal. When a video signal cable is not properly connected, a message such as “check the connection” is displayed, and when various setting operations are performed using a manipulation button on the front of the monitor, the operations are displayed on screen. All of this employs the OSD function. OSD is usually used to manipulate a monitor's screen display function.
Image formats express digital color images include a variety of formats such as “YUV”, “YIQ”, etc. in addition to a “RGB” format used in a color computer graphic or a color television. The RGB format expresses a color image using three components: R (Red), G (Green), and B (Blue). The YUV format expresses a color image using a luminance component Y, and two color components U and V. The YIQ format is similar to the YUV format.
FIG. 1 is a reference view illustrating a conventional OSD/graphic data. FIG. 1 shows an example of a display screen displayed in a system mounted LCD panel mainly in charge of an interface of a digital camera or a digital camcorder in which video data 110 is displayed in a lowest layer, OSD information indicating a playback state 120 and a date 130 is displayed above the video data 110, and a user interface menu 140 comprising graphic data having a plurality of layers is displayed on the middle of the display screen.
If a screen displayed on an LCD panel of a digital camera or a digital camcorder is also transmitted to CRT, the OSD information indicating the playback state 120 and the date 130 is displayed; however, the user interface menu 140 is not displayed.
Conventionally, the OSD information or graphic data displayed on these display devices is stored in a separate memory, and the stored OSD information and graphic data are read, processed separately, and displayed on each display device. The graphic data may also be composed of a plurality of graphic layers which are all stored separately and are combined to be displayed on a display device.
FIG. 2 is a block diagram illustrating a general bus system including a conventional video display apparatus. Referring to FIG. 2, a bus system includes a microprocessor 210, a master 220, a postprocessor 230, a memory 240, a video display controller 250, display devices 260, and a system bus 270.
The microprocessor 210 supports an OSD that informs users of system information or video information, generates OSD data and graphic data, and stores them in a memory so as to support an alpha blending function and various graphic layers in order to provide various user interfaces.
The bus master (MASTER #2) 220, which is a device that may be a master having authority to control the bus system, includes an input unit that receives an input signal from a camera and stores the signal in a system memory.
The memory 240 stores input video data from a camera and layers of graphic data which is combined with the video data and is displayed.
The postprocessor 230 reads data from a certain area of the memory 240 and displays the data on the video display controller 250, which displays data received from the postprocessor 230 on each of the display device 260.
The system bus 270 transmits data between devices connected to the bus system.
When an input YUV signal sampled at a rate of 4:2:2 is received from a camera, the YUV signal is compressed, restored, stored, or transformed by a video processor, and the transformed data or the stored video data is displayed by a video display device. In general, video display devices express colors represented by a color coordinate system having three-dimensional coordinate axes such as R/G/B, Y/cb/Cr, Y/pb/Pr, etc. The video display device may be a single display device or a plurality of display devices, and data may be simultaneously displayed on a plurality of video display devices.
For example, when a video display device is composed of a CRT display device requiring SD (720*480 or 720*576) Y/cb/Cr video received from a camera, and of a display device requiring RGB video having a different resolution, a color converter that converts the video and a zooming converter that converts an input/output resolution are required due to the different color spaces. An alpha blending function is also required to blend the OSD data and graphic layer.
An equation used for alpha blending is described below.Out(x,y)=Img(x,y)*(1−alpha(x,y))+Grp(x,y)*(alpha)
Wherein, Img(x,y) denotes an image input to a video display control apparatus, 1-alpha(x,y) denotes an alpha blending value which is multiplied by the input image, Grp(x,y) denotes graphic data, alpha denotes an alpha blending value which is multiplied by the graphic data, and Out(x,y) denotes an alpha blended display video.
FIG. 3 is a detailed block diagram illustrating the video display apparatus shown in FIG. 2. Referring to FIG. 3, the video display apparatus includes a memory 240, a postprocessor 230, an NTSC encoder 251, an LCD controller 252, a CRT 261, and an LCD 262.
The memory 240 stores video data 241, graphic data 242 and alpha data 243 for the CRT, and graphic data 244 and alpha data 245 for the LCD.
The video data 241 contains an input Y/Cb/Cr signal received from a camera, which is sampled using an interfacing method at a rate of 4:2:2.
The graphic data 242 and alpha data 243 for the CRT indicate graphic data and alpha data which are displayed on the CRT. The size of graphic data and alpha data is 720*480 which is the same as the video data. The graphic data 244 and alpha data 245 for the LCD indicate graphic data and alpha data which are displayed on the LCD. The size of graphic data and alpha data is 480*240. Each graphic data is generally sampled at 4:4:4, and an alpha value is generally expressed as a level of 16 or 256.
The postprocessor 230 includes a YCbCr2RGB 231, a (1-alpha) blender 232, an alpha blender 233, an alpha blender 234, an adder 235, an RGB2YCbCr 236, a scalar 237, and an adder 238.
The YCbCr2RGB 231 converts a YcbCr signal of the video data 241 read from the memory 240 into RGB for alpha blending. The (1-alpha) blender 232 performs alpha blending by multiplying (1-alpha) by the video data converted into a RGB format. The alpha blender 233 performs alpha blending for the graphic data for the CRT by multiplying the alpha data 243 by the graphic data 242 which are read from the memory 240. The alpha blender 234 performs alpha blending for the graphic data for the LCD by multiplying the alpha data 245 by the graphic data 244 which are read from the memory 240. The adder 235 adds the alpha blended video data and the alpha blended graphic data and outputs them to the RGB2YCbCr 236. The RGB2YCbCr 236 converts the received data in a RGB format into an YCbCr format. The scalar 237 changes the resolution of the alpha blended video data to correspond to the size of the LCD. The adder 238 adds the alpha blended video data whose resolution is changed and the alpha blended graphic data and outputs them to the LCD controller 252.
The NTSC encoder 251 outputs data received from the RGB2YCbCr 236 to the CRT 261, and the CRT 261 displays the received data. The LCD controller 252 outputs the data received from the adder 238 to the LCD 262, and the LCD 262 displays the received data.
Meanwhile, as most multimedia devices tend to require a high compressibility and various data transformations, the data bus proportion maintains considerably high. As the portability of multimedia devices increases, the clock signal of a system is decreased by decreasing various methods to reduce operation of the inside of the system and the bus proportion.
However, the bus proportion of a video display control apparatus among a plurality of masters on bus is rather considerably high due to various types of data. A graphic handling is to read each layer from the memory and directly add it in hardware, which also results in increasing the bus proportion.
FIG. 4 is a reference view illustrating the graphic layer and the graphic data shown in FIG. 3. Referring to FIG. 4, layer 0 and layer 1 having a size of 720*480 are read from a memory and combined in order to generate graphic data for the CRT. Layer 0, layer 1, and layer 2 having a size of 480*240 are read from a memory and are combined in order to generate graphic data for the LCD. As such, the memory contains a plurality of layers required to generate each graphic data, and the postprocessor 230 has to read all the layers in order to generate the graphic data as show in FIG. 3. Accordingly, a bottleneck occurs in a bus system between the memory 240 and the post processor 230.
The above conventional method increases the size of the bus proportion.